1. Field of the Invention
The present invention relates to a technique for making a semiconductor device that includes the formation of a reduced-stress nitride layer on the semiconductor device
2. Description of the Prior Art
In conventional semiconductor device processing, nitride layers are utilized in isolation structures and as part of an inter-level dielectric structure ("ONO" or "ONON" dielectrics, for example that use alternating layers of oxide and nitride). Presently, an LPCVD process is used to deposit the nitride in a single step on the oxide surface. In particular, NH.sub.3 and SiH.sub.2 Cl.sub.2 are reacted at temperatures between 750.degree. C. and 850.degree. C. to form the nitride film. This process results in generating significant stress between the deposited nitride and underlying oxide, forming defects in the structure and a large variability in the nitride thickness. These problems limit the usefulness of the nitride film in sub-micron applications where thickness needs to be well-controlled. The stress also results in the formation of microcracks and pin-holes in the structure and is problematic when used as part of an ONO or ONON dielectric.